1. Field of the Invention
The present invention relates to a semiconductor package where a semiconductor chip such as an LSI is mounted.
2. Description of the Related Art
In general, there are a BGA (Ball Grid Array), a WCSP (Wafer-level Chip Size Package) and the like as semiconductor packages having solder balls.
FIG. 8 is a bottom view of such a conventional package.
On the bottom 2 of a package 1, an enough number of solder balls 3 to form necessary terminals are arranged at equal pitches. In the example of this figure, 64 terminals are formed.
Meanwhile, Japanese Patent Laid-Open Publication No. 2000-068403 discloses that solder bumps for radiating heat are formed at narrower pitches than solder bumps for connection such that in heat processing for joining to a board, all the solder bumps for radiating heat together form a single joint layer.
U.S. Pat. No. 6,194,782 discloses that in FIG. 5 thereof, solder balls 40 are placed in closer proximity to each other than solder balls 24 which are not positioned under a die.
However, the market requires that pitches of terminals be large and package sizes be small, which are contradictory.
If the pitch is widened without changing the package size, terminals may fall short in number not securing a necessary number of terminals for an LSI or the like.
For example, for a square package of 6.4 mm in dimension, if a user requires that the predetermined pitch be 0.8 mm and the number of necessary terminals (including power, ground, and test terminals) be 95, the prior art of FIG. 8 can secure only 64 terminals, thus not satisfying the requirements.
Meanwhile, the above Japanese Patent Laid-Open Publication and U.S. Patent describe that an area where the pitch of terminals is narrow and an area where the pitch of terminals is wide are provided so that the terminals placed at the narrow pitches are used for radiating and managing heat, but do not at all describe the problem of increasing the number of terminals without enlarging the package size. Moreover, no description at all is made on arranging test terminals at narrow pitches, which usually do not need to be connected to a board.